7474

54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs

June 1989

54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs
General Description
This device contains two independent positive-edge-triggered D flip-flops with complementary outputs The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock The data on the D input may be changed while the clock is low or high without affecting the outputs as long as the data setup and hold times are not violated A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs

Features
Y

Alternate military aerospace device (54LS74) is available Contact a National Semiconductor Sales Office Distributor for specifications

Connection Diagram
Dual-In-Line Package

TL F 6373 – 1

Order Number 54LS74DMQB 54LS74FMQB 54LS74LMQB DM54LS74AJ DM54LS74AW DM74LS74AM or DM74LS74AN See NS Package Number E20A J14A M14A N14A or W14B

Function Table
Inputs PR L H L H H H CLR H L L H H H CLK X X X D X X X H L X Outputs Q H L H H L Q0 Q L H H L H Q0

u u
L

H e High Logic Level X e Either Low or High Logic Level L e Low Logic Level

u e Positive-going Transition e This configuration is nonstable that is it will not persist when either the preset

and or clear inputs return to their inactive (high) level Q0 e The output logic level of Q before the indicated input conditions were established

C1995 National Semiconductor Corporation

TL F 6373

RRD-B30M105 Printed in U S A

Absolute Maximum Ratings (Note)
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and