Lpc2103 user manual

UM10161
LPC2101/02/03 User manual
Rev. 4 — 13 May 2009 User manual

Document information Info Keywords Abstract Content LPC2101, LPC2102, LPC2103, ARM, ARM7, embedded, 32-bit, microcontroller LPC2101/02/03 User manual revision

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UM10161
LPC2101/02/03 User manual

Revision history Rev 04 Date 20090513 Description LPC2101/02/03 User manual

Modifications:

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03

Description of Deep power-down mode and power selector module added (LPC2101/02/03 revisions A and higher only). See Section 5–10, Section 18–6.14, and Section 18–7. Description of three CRP levels added (LPC2101/02/03 revisions A and higher only). See Section 19–8. 20081002 LPC2101/02/03 User manual

Modifications:

• • • • • • • • • • • •
02

Description of pins VBAT, RTCX1, RTCX2, VDDA, and VDD(1V8) updated. Bit description for bits CPOL and CPHA in SSPCR0 register updated. Pin description for ADC pins updated. PLCC44 pin configuration removed. HVQFN48 pin configuration added. I2C pin description in pin configuration updated. Timer2/3 register names PWM2/3CON updated. Description of JTAG pin TCK updated. Bit description in CTC register updated. Various editorial updates. Description of fractional baudrate generator updated for UART0 and UART1. Bit description of the PCONP register updated. 20070801 LPC2101/02/03 User manual

Modifications:

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01

SCL1 and SDA1 pins described as not open-drain. 20060112 Initial version

Contact information
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UM10161_4 © NXP B.V. 2009. All rights reserved.

User manual

Rev. 4 — 13 May 2009

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UM10161
Chapter 1: LPC2101/02/03 Introductory information
Rev. 4 — 13 May 2009 User manual

1. Introduction
The LPC2101/02/03 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 8 kB, 16 kB, or 32 kB of