dsp_DSPic

dsPIC

PROCESSAMENTO DIGITAL DE SINAIS I

Objetivo
Conhecer e identificar as características de hardware que fazem o processador escolhido ser chamado de
DSP.
Modelo escolhido:

High-Performance, 16-bit
Digital Signal Controllers

dsPIC33FJ256GP506
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Principais Características
High-Performance DSC CPU:
• Modified Harvard architecture
• C compiler optimized instruction set
• 16-bit wide data path
• 24-bit wide instructions
• Linear program memory addressing up to 4M instruction words
• Linear data memory addressing up to 64 Kbytes
• 83 base instructions: mostly 1 word/1 cycle
• Sixteen 16-bit General Purpose Registers
• Two 40-bit accumulators:
- With rounding and saturation options
• Flexible and powerful addressing modes:
- Indirect, Modulo and Bit-Reversed
• Software stack
• 16 x 16 fractional/integer multiply operations
• 32/16 and 16/16 divide operations
• Single-cycle multiply and accumulate:
- Accumulator write back for DSP operations
- Dual data fetch
• Up to ±16-bit shifts for up to 40-bit data

Direct Memory Access (DMA):
• 8-channel hardware DMA:
• 2 Kbytes dual ported DMA buffer area
(DMA RAM) to store data transferred via DMA:
- Allows data transfer between RAM and a peripheral while CPU is executing code
(no cycle stealing)
• Most peripherals support DMA
Interrupt Controller:
• 5-cycle latency
• 118 interrupt vectors
• Up to 67 available interrupt sources
• Up to 5 external interrupts
• 7 programmable priority levels
• 5 processor exceptions
On-Chip Flash and SRAM:
• Flash program memory, up to 256 Kbytes
• Data SRAM, up to 30 Kbytes (includes 2 Kbytes of
DMA RAM):

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Principais Características
Interrupt Controller:
• 5-cycle latency
• 118 interrupt vectors
• Up to 67 available interrupt sources
• Up to 5 external interrupts
• 7 programmable priority levels
• 5 processor exceptions
Digital I/O:
• Up to 85 programmable digital I/O pins
• Wake-up/Interrupt-on-Change on up to 24